Projects per year
Personal profile
Personal profile
Kain Lu Low holds Bachelor’s and Master’s degrees in Electrical and Computer Engineering from Purdue University, USA, and a PhD from the National University of Singapore. His research in computational semiconductor materials and device design within the DTCO framework has led to publications in acclaimed journals, such as IEEE Transactions on Electron Devices, and presentations at international conferences. Currently, Kain Lu is an associate professor at Xi’an Jiao Tong Liverpool University, focusing on innovations in semiconductor technologies from advanced materials and device perspectives. He previously held the same position at Shanghai Jiao Tong University from 2020 to 2023. In industry, he has been involved in developing circuit simulation software at a startup in Silicon Valley, California and served as a senior engineer at GLOBALFOUNDRIES in Singapore, focusing on Design Rule Checking (DRC), Layout Versus Schematic (LVS), and mask generation rules.
Expertise related to UN Sustainable Development Goals
In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This person’s work contributes towards the following SDG(s):
Education/Academic qualification
PhD, National University of Singapore
Master, Purdue University
Bachelor, Purdue University
Person Types
- Staff
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Collaborations and top research areas from the last five years
Projects
- 1 Active
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Advancing GaN CMOS Technology: Optimizing Device Performance and Design Efficiency through AI-Integrated TCAD Modeling
1/01/25 → 31/12/27
Project: Internal Research Project
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Au-Free Ti/Al/Ni/TiN Ohmic Contact to AlGaN/GaN Heterostructure: Ti/Al Thicknesses at an Optimized Ratio
Ling, M., Sun, Z., Li, J., Wang, W., Zhang, Y., Zhang, P., Zhao, Y., Zhang, J., Low, K. L., van Zalinge, H., Mitrovic, I. & Liu, W., 2024, (Accepted/In press) In: Physica Status Solidi (A) Applications and Materials Science.Research output: Contribution to journal › Article › peer-review
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Characterization of Trap States in AlGaN/GaN MIS-High-Electron-Mobility Transistors under Semi-on-State Stress
Liang, Y., Duan, J., Zhang, P., Low, K. L., Zhang, J. & Liu, W., Sept 2024, In: Nanomaterials. 14, 18, 1529.Research output: Contribution to journal › Article › peer-review
Open Access1 Citation (Scopus) -
Descriptor: MOSFET Electrical Simulation Dataset (MESD)
Low, K. L., Zhang, Y., Li, L., Shao, L., Sun, Y., Zhao, J., Sun, Y., Shi, Y. & Li, Y., Oct 2024, In: IEEE Data Descriptions . 1, p. 27-32 6 p.Research output: Contribution to journal › Article › peer-review
Open Access -
Graph Attention Network-Based Unified TCAD Modeling Enabling Fast Design Technology Co-Optimization Through Transfer Learning
Fan, G., Ma, T., Xu, X., Shao, L. & Low, K. L., 14 Nov 2024, In: IEEE Transactions on Electron Devices.Research output: Contribution to journal › Article › peer-review
Open Access -
High-Yield Enhancement-Mode GaN p-FET With Etching-Target Layer and High-Selectivity Etching Techniques
Zhang, X., Zhang, Y., Duan, J., Sun, Z., Wang, W., Liang, Y., Yang, X., Zhang, L., Chen, Z., Zhang, J., Low, K. L. & Liu, W., 2024, (Accepted/In press) In: IEEE Transactions on Electron Devices.Research output: Contribution to journal › Article › peer-review
Activities
- 1 Presentation at conference/workshop/seminar
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SDG Summer Course: Emerging Semiconductor Devices and Their Sustainable Innovations
Kain Lu Low (Speaker)
26 Jun 2024 → 18 Jul 2024Activity: Talk or presentation › Presentation at conference/workshop/seminar