Simulation of tunneling field-effect transistors with extended source structures

In this paper, we perform a study of novel source structures in double-gate (DG) Tunneling Field-Effect Transistors (TFETs) by two-dimensional numerical simulation of source structures in double gate tunneling field effect. Extended source structures are employed in both pure Ge TFETs and Ge-source Si-body TFETs, and on-state current enhancement is observed in simulation results. Compared with conventional p ⁺-p ^--n ⁺ TFETs, the p ⁺ region in extended source TFETs extends underneath the gates. When large gate bias is applied, high electric field ξ, which distributes along p ⁺-p ^- junction edge extends into the middle of the channel. More tunneling paths with short lengths are available in the on-state, effectively boosting the drive current of TFET. In addition, the extent of performance enhancement depends on the geometry of the extended source. By incorporating heterojunction, TFET drive current can be increased further, which is up to 0.8 mA/μm at V _GS V _DS 0.7 V.