Numerical simulation of all-optical header processor using carrier reservoir semiconductor optical amplifiers

Amer Kotb*, Kyriakos E. Zoiros, Eng Hwa Yap*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

Numerical simulations at 120 Gb/s for return-to-zero (RZ) data are performed, for the first time to our knowledge, on an all-optical header processor based on cascaded carrier reservoir semiconductor optical amplifiers (CR-SOAs)-assisted Mach–Zehnder interferometers that serve as XOR logic gates. To get more accurate findings, the effect of CR-SOA amplified spontaneous emission (ASE) noise is considered when assessing the quality factor (Q-factor) of the output signals to the number of consecutive header processing stages. The Q-factor achieved for 120 Gb/s RZ data is 21.5, which, although reduced with the number of stages and ASE noise, can remain acceptable for up to 5 header processing stages.

Original languageEnglish
JournalJournal of Optics (India)
DOIs
Publication statusAccepted/In press - 2024

Keywords

  • All-optical header processor
  • Carrier reservoir semiconductor optical amplifier
  • Mach–Zehnder interferometer

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