First monolithic integration of Ge P-FETs and InAs N-FETs on silicon substrate: Sub-120 nm III-V buffer, sub-5 nm ultra-thin body, common raised S/D, and gate stack modules

Sachin Yadav, Kian Hua Tan, Annie, Kian Hui Goh, Sujith Subramanian, Kain Lu Low, Nanyan Chen, Bowen Jia, Soon Fatt Yoon, Gengchiau Liang, Xiao Gong, Yee Chia Yeo

Research output: Chapter in Book or Report/Conference proceedingConference Proceedingpeer-review

12 Citations (Scopus)

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