A Comparative Study of Short Channel Effects in 3-D FinFET with High-K Gate Di-electric

Rao Muhammad Asif, Saif Ur Rehman, Ateeq Ur Rehman, Mohit Bajaj, Subhashree Choudhury, T. P. Dash

Research output: Chapter in Book or Report/Conference proceedingConference Proceedingpeer-review

3 Citations (Scopus)

Abstract

With the advancement of Semiconductor Technology, FinFET replaces MOSFET. It is one of the frontier devices due to suppressed short channel effects, outstanding performance for high-frequency applications, and better power control. This paper proposed a FinFET structure with different analytical models for drain-current, channel charge, and velocity. The dielectric materials of different underlap lengths for gate oxide have been implemented and compared their performance for SCE. The short channel effects for dielectric materials SiO2, and Al2O3 are also examined. The critical parameters such as threshold gate voltages and drain current, including short channel effects have been evaluated using the proposed model. The transfer and output characteristics have been shown. FinFET with high-k dielectric shows higher Ion/Ioff ratio and reduced threshold voltage. These results validate the proposed model to reduce the SCE.

Original languageEnglish
Title of host publication2021 International Conference in Advances in Power, Signal, and Information Technology, APSIT 2021
EditorsNiranjan Nayak, Taraprasanna Dash, Tanmoy Parida
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665425063
DOIs
Publication statusPublished - 2021
Externally publishedYes
Event2021 International Conference in Advances in Power, Signal, and Information Technology, APSIT 2021 - Bhubaneswar, India
Duration: 8 Oct 202110 Oct 2021

Publication series

Name2021 International Conference in Advances in Power, Signal, and Information Technology, APSIT 2021

Conference

Conference2021 International Conference in Advances in Power, Signal, and Information Technology, APSIT 2021
Country/TerritoryIndia
CityBhubaneswar
Period8/10/2110/10/21

Keywords

  • Drain current
  • FinFET
  • Gate voltages
  • Short channel effect

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