The silicon-on-sapphire technology for RF integrated circuits: Potential and limitations

Sang Lam*, Wing Hung Ki, Mansun Chan

*Corresponding author for this work

Research output: Chapter in Book or Report/Conference proceedingConference Proceedingpeer-review

1 Citation (Scopus)

Abstract

The RF performances of both active and passive devices on the 0.5-μm silicon-on-sapphire (SOS) technology is comparatively investigated with a 0.5-μm bulk counterpart. Although the SOS technology shows better inductor quality factor (Q) of 3 to 4 times improvement, the usable frequency range lies only within about 2-6GHz. Further, the noise performance of the SOS MOSFET is in general inferior as compared to that of the bulk CMOS by 1dB. It degrades further at the post DC kink region due to the floating body effects. Design issues are discussed for RF integrated circuits implemented on SOS technology.

Original languageEnglish
Title of host publicationIEEE Region 10 International Conference on Electrical and Electronic Technology
EditorsD. Tien, Y.C. Liang, D. Tien, Y.C. Liang
Pages483-486
Number of pages4
Publication statusPublished - 2001
Externally publishedYes
EventIEEE Region 10 International Conference on Electrical and Electronic Technology - Singapore, Singapore
Duration: 19 Aug 200122 Aug 2001

Publication series

NameIEEE Region 10 International Conference on Electrical and Electronic Technology

Conference

ConferenceIEEE Region 10 International Conference on Electrical and Electronic Technology
Country/TerritorySingapore
CitySingapore
Period19/08/0122/08/01

Keywords

  • Noise parameters
  • RF integrated circuits
  • SOI MOSFET
  • Silicon-on-insulator technology

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