TY - GEN
T1 - PAFESD
T2 - 2007 7th International Conference on ASIC, ASICON 2007
AU - Man, K. L.
PY - 2007
Y1 - 2007
N2 - In this paper, we review a number of process algebra based formalisms that can be used for the formal specification of electronic system designs. It should be of interest to architects, engineers and researchers from the electronic design community. This paper also covers various formal techniques (process algebra based) for analysis of electronic system designs. Furthermore, we devote some space in this paper to an brief introduction of two process algebraic theories/frameworks SystemCFL and PAFSV that can be regarded as the formal languages of SystemC and SystemVerilog respectively.
AB - In this paper, we review a number of process algebra based formalisms that can be used for the formal specification of electronic system designs. It should be of interest to architects, engineers and researchers from the electronic design community. This paper also covers various formal techniques (process algebra based) for analysis of electronic system designs. Furthermore, we devote some space in this paper to an brief introduction of two process algebraic theories/frameworks SystemCFL and PAFSV that can be regarded as the formal languages of SystemC and SystemVerilog respectively.
UR - http://www.scopus.com/inward/record.url?scp=48349083475&partnerID=8YFLogxK
U2 - 10.1109/ICASIC.2007.4415579
DO - 10.1109/ICASIC.2007.4415579
M3 - Conference Proceeding
AN - SCOPUS:48349083475
SN - 1424411327
SN - 9781424411320
T3 - ASICON 2007 - 2007 7th International Conference on ASIC Proceeding
SP - 110
EP - 113
BT - ASICON 2007 - 2007 7th International Conference on ASIC Proceeding
Y2 - 26 October 2007 through 29 October 2007
ER -