Abstract
This study demonstrates the first work that achieves accurate modeling of Hydrogen plasmatreated (H-treated) p-GaN gate devices with the ASM-GaN model, facilitating simulations for applications in monolithic integrated circuit (IC) design. The workflow for ASM-GaN model parameter extraction and optimization using IC-CAP is proposed. The I-V characteristics of both Enhancement / Depletion (E/D) mode devices are modeled and fitted. The impact of device capacitance on the dynamic properties of monolithic IC is investigated through the ASM model. The results demonstrate that Cds, Cgd, and Cgs have different effects on the monolithic logic circuit performances. The high-level fitting of experimental data and circuit simulation of Inverter, NAND, and Comparator circuits proves the credibility of the modeling workflow and device capacitance modulation. This work provides a method to speed up the GaN monolithic IC design by accurate modeling with fast parameter extraction workflow regardless of the fabrication process. The reliable prediction of the circuit's dynamic performance will lay the foundation for designing and scaling up the GaN monolithic IC application.
Original language | English |
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Pages (from-to) | 457-463 |
Number of pages | 7 |
Journal | IEEE Journal of the Electron Devices Society |
Volume | 12 |
DOIs | |
Publication status | Published - 2024 |
Keywords
- ASM model
- DCFL circuit
- GaN HEMTs
- capacitance
- dynamic performance
- hydrogen plasma treatment