Implementation of high performance multipliers based on approximate compressor design

Jieming Ma, Ka Lok Man, Tomas Krilavičius, Sheng Uei Guan, Taikyeong Jeong

Research output: Chapter in Book or Report/Conference proceedingConference Proceedingpeer-review

14 Citations (Scopus)

Abstract

Estimating arithmetic is a design paradigm for DSP hardware. By allowing structurally incomplete arithmetic circuits to occasionally perform imprecise calculations, higher performance can be achieved in many different electronic systems. This paper presents a potential useful approach to implement tree multipliers by using estimating arithmetic. Experimental results show the applicability and effectiveness of the proposed approach.

Original languageEnglish
Title of host publication6th International Conference on Electrical and Control Technologies, ECT 2011
EditorsA. Jonaitis, A. Sauhats, A. Virbalis, K. Brazauskas, M. Azubalis, A. Navickas, V. Galvanauskas
PublisherKaunas University of Technology
Pages96-100
Number of pages5
ISBN (Electronic)9781634398008
Publication statusPublished - 2011
Event6th International Conference on Electrical and Control Technologies, ECT 2011 - Kaunas, Lithuania
Duration: 5 May 20116 May 2011

Publication series

Name6th International Conference on Electrical and Control Technologies, ECT 2011

Conference

Conference6th International Conference on Electrical and Control Technologies, ECT 2011
Country/TerritoryLithuania
CityKaunas
Period5/05/116/05/11

Keywords

  • Compressors
  • Computer arithmetic
  • Estimating arithmetic
  • Multipliers

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