TY - JOUR
T1 - Efficient tasks scheduling in multicore systems integrated with hardware accelerators
AU - Xu, Jinyi
AU - Shi, Hao
AU - Chen, Yixiang
N1 - Publisher Copyright:
© 2022, The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature.
PY - 2023/5
Y1 - 2023/5
N2 - Multicore systems integrated with hardware accelerators provide better performance for executing real-time applications in time-critical fields, such as robots, avionics, and aerospace. The integration of hardware accelerators brings new challenges for system scheduling; the software scheduling problem is extended to a hardware–software co-scheduling problem. Efficient co-scheduling strategy maximizes the benefits of hardware acceleration, which is important for time-critical systems. To solve this problem, we propose a co-scheduling strategy to minimize the system execution time. It combines hardware–software resource allocation and a real-time schedule method. Our scheduling can fit the different parallel in software and hardware (e.g., CPUs and FPGAs). The key component of our strategy is its novel hardware–software resource allocation and a high-performance heuristic scheduling algorithm. In the experiments, we evaluate our approach using both simulated and real parallel applications. The results illustrate that our algorithm obtains efficient solutions within reasonable runtimes compared to the state of the art.
AB - Multicore systems integrated with hardware accelerators provide better performance for executing real-time applications in time-critical fields, such as robots, avionics, and aerospace. The integration of hardware accelerators brings new challenges for system scheduling; the software scheduling problem is extended to a hardware–software co-scheduling problem. Efficient co-scheduling strategy maximizes the benefits of hardware acceleration, which is important for time-critical systems. To solve this problem, we propose a co-scheduling strategy to minimize the system execution time. It combines hardware–software resource allocation and a real-time schedule method. Our scheduling can fit the different parallel in software and hardware (e.g., CPUs and FPGAs). The key component of our strategy is its novel hardware–software resource allocation and a high-performance heuristic scheduling algorithm. In the experiments, we evaluate our approach using both simulated and real parallel applications. The results illustrate that our algorithm obtains efficient solutions within reasonable runtimes compared to the state of the art.
KW - Hardware accelerators
KW - Multicore systems
KW - Real-time applications
KW - Task scheduling
UR - http://www.scopus.com/inward/record.url?scp=85142709308&partnerID=8YFLogxK
U2 - 10.1007/s11227-022-04955-w
DO - 10.1007/s11227-022-04955-w
M3 - Article
AN - SCOPUS:85142709308
SN - 0920-8542
VL - 79
SP - 7244
EP - 7271
JO - Journal of Supercomputing
JF - Journal of Supercomputing
IS - 7
ER -