Dynamic Priority Arbitration Strategy for Interconnections of Hardware Spiking Neural Networks

Based on the EMBRACE, i. e. a hardware architecture for the SNN, a dynamic priority arbitration strategy for a Networks-on-Chip (NoC) router is proposed to solve the non-balance traffic load problem of the SNN system. A2DmeshNoC system is used to provide the interconnected communication for the neurons. The dynamic priority arbitration strategy is based on the spiking transmission frequencies and it can reduce the risk of the packet loss and the average delay of the paths with heavy traffics, and improve the reliability of system. The Noxim simulator is used to build the simulation platform. The experimental results show that compared to the round-robin and fixed priority arbitration schemes, the proposed dynamic priority arbitration strategy has an average of 32.33% and 34.69%(maximum 84.86% and 86.20%) decrease for the delays of paths with heavy traffics. Based on the 90nm CMOS technology, the hardware area is 213, 471μm², which demonstrates its scalability.