TY - JOUR
T1 - Design and Experimental Demonstration of Integrated Over-Current Protection Circuit for GaN DC-DC Converters
AU - Sun, Ruize
AU - Liang, Yung C.
AU - Yeo, Yee Chia
AU - Zhao, Cezhou
AU - Chen, Wanjun
AU - Zhang, Bo
N1 - Funding Information:
Manuscript received April 18, 2019; revised July 5, 2019 and September 16, 2019; accepted October 16, 2019. Date of publication October 18, 2019; date of current version November 5, 2020. This work was supported in part by the Sichuan Youth Science and Technology Foundation under Grant 2017JQ0020, in part by the Major Science and Technology Special Projects in Guangdong under Grant 2017B010112003, and in part by the China Postdoctoral Science Foundation. Recommended for publication by Associate Editor Francisco J. Azcondo. (Corresponding author: Ruize Sun.) R. Sun, W. Chen, and B. Zhang are with the State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China (e-mail: rzsun@uestc.edu.cn).
Publisher Copyright:
© 2013 IEEE.
PY - 2020/12
Y1 - 2020/12
N2 - This article reports the design and the first experimental demonstration of the monolithically integrated over-current protection (OCP) circuit in GaN power converters. The design criteria and protection time estimation methods are proposed. Through the GaN integration platform based on normally-OFF AlGaN/GaN metal insulator semiconductor high electron mobility transistors (MIS-HEMTs), the OCP circuit is monolithically integrated with the gate driver and GaN switches. At the over-current incident, the current sensing signal is compared with over-current thresholds, and then the generated protection action signal is clamped to disable the high-side gate driver and shut down the GaN dc-dc buck converter. The analysis of current paths, SPICE-based simulations, and numerical description of the protection process are carried out to support the proposed design criteria and estimation methods. The experimental results show that the GaN dc-dc buck converter can be protected within one duty cycle period according to the desired preset over-current thresholds. The consistent results of the calculated and measured time periods in the OCP process have verified the proposed design criteria and estimation methods. The proposed OCP circuit together with the analysis can help researchers to design and estimate the OCP process in integrated GaN power converters.
AB - This article reports the design and the first experimental demonstration of the monolithically integrated over-current protection (OCP) circuit in GaN power converters. The design criteria and protection time estimation methods are proposed. Through the GaN integration platform based on normally-OFF AlGaN/GaN metal insulator semiconductor high electron mobility transistors (MIS-HEMTs), the OCP circuit is monolithically integrated with the gate driver and GaN switches. At the over-current incident, the current sensing signal is compared with over-current thresholds, and then the generated protection action signal is clamped to disable the high-side gate driver and shut down the GaN dc-dc buck converter. The analysis of current paths, SPICE-based simulations, and numerical description of the protection process are carried out to support the proposed design criteria and estimation methods. The experimental results show that the GaN dc-dc buck converter can be protected within one duty cycle period according to the desired preset over-current thresholds. The consistent results of the calculated and measured time periods in the OCP process have verified the proposed design criteria and estimation methods. The proposed OCP circuit together with the analysis can help researchers to design and estimate the OCP process in integrated GaN power converters.
KW - DC-DC buck converter
KW - GaN metal insulator semiconductor high electron mobility transistor (MIS-HEMTs)
KW - monolithic integration
KW - over-current protection (OCP)
KW - shutdown clamp
UR - http://www.scopus.com/inward/record.url?scp=85090569148&partnerID=8YFLogxK
U2 - 10.1109/JESTPE.2019.2948280
DO - 10.1109/JESTPE.2019.2948280
M3 - Article
AN - SCOPUS:85090569148
SN - 2168-6777
VL - 8
SP - 4270
EP - 4278
JO - IEEE Journal of Emerging and Selected Topics in Power Electronics
JF - IEEE Journal of Emerging and Selected Topics in Power Electronics
IS - 4
M1 - 8876607
ER -