TY - GEN
T1 - Demonstration of the Hydrogen Passivated GaN HEMTs IC Platform
AU - Li, Fan
AU - Li, Ang
AU - Wang, Yubo
AU - Zhu, Yuhao
AU - Yu, Chengruiyuan
AU - Ding, Chengmurong
AU - Wu, Shiqiang
AU - Liu, Wen
AU - Yu, Guohao
AU - Gao, Xiaotian
AU - Wang, Zheming
AU - Zhang, Baoshun
N1 - Funding Information:
This work was supported by the Suzhou Science and Technology program (SYG201923, SYG202131), the Youth Innovation Promotion Association CAS (Grant No. 2020321), and the National Natural Science Foundation of China (Grant No. 92163204)
Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - This article presents comprehensive research on the 4-inch monolithic integrated circuit platform based on the hydro-gen passivated pGaN/AlGaN/GaN HEMTs technology. The com-parisons between H2 passivated device and traditional selectively etched pGaN gate device are made. The experimental results demonstrate that the H2 passivation layer not only provides higher breakdown voltage and lower current collapse effect but also enhances VTH stability under gate stresses. The circuit components, such as the 2DEG resistor, capacitor, and diode, are verified under a high-temperature environment to exploit the advantage of All-GaN integration. The depletion mode device is seamlessly integrated by applying the H2 passivated pGaN layer as the gate dielectric. This method no longer requires the growth of an additional gate dielectric layer, and the fabrication complexity can be reduced. The logic gates, comparator, and driver circuit are realized based on this achievement.
AB - This article presents comprehensive research on the 4-inch monolithic integrated circuit platform based on the hydro-gen passivated pGaN/AlGaN/GaN HEMTs technology. The com-parisons between H2 passivated device and traditional selectively etched pGaN gate device are made. The experimental results demonstrate that the H2 passivation layer not only provides higher breakdown voltage and lower current collapse effect but also enhances VTH stability under gate stresses. The circuit components, such as the 2DEG resistor, capacitor, and diode, are verified under a high-temperature environment to exploit the advantage of All-GaN integration. The depletion mode device is seamlessly integrated by applying the H2 passivated pGaN layer as the gate dielectric. This method no longer requires the growth of an additional gate dielectric layer, and the fabrication complexity can be reduced. The logic gates, comparator, and driver circuit are realized based on this achievement.
KW - GaN HEMTs
KW - HPassivation
KW - IC Platform
UR - http://www.scopus.com/inward/record.url?scp=85163449921&partnerID=8YFLogxK
U2 - 10.1109/ISPSD57135.2023.10147680
DO - 10.1109/ISPSD57135.2023.10147680
M3 - Conference Proceeding
AN - SCOPUS:85163449921
T3 - Proceedings of the International Symposium on Power Semiconductor Devices and ICs
SP - 99
EP - 102
BT - 35th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2023
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 35th International Symposium on Power Semiconductor Devices and ICs, ISPSD 2023
Y2 - 28 May 2023 through 1 June 2023
ER -