TY - GEN
T1 - BSAA
T2 - 19th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2009
AU - English, Tom
AU - Lok Man, Ka
AU - Popovici, Emanuel
PY - 2010
Y1 - 2010
N2 - We present Bus Switching Activity Analyser (BSAA), a switching activity analysis and visualisation tool for SoC power optimisation. BSAA reads switching metrics from RTL simulation, reporting the most active buses and hierarchies. Buses with typical address and data bus traffic are identified automatically. The tool can process multiple simulation runs simultaneously, analysing how switching varies with input data or software code. BSAA complements commercial tools, helping the designer find opportunities to apply power-saving techniques. To illustrate BSAA's powerful features, we analyse switching in an MP3 decoder design using several audio inputs and in a microcontroller running a suite of software tasks. We demonstrate the tool's usefulness by applying it in the power optimisation of a small MPSoC, obtaining on average a 60% reduction in dynamic power across five software tasks and identifying opportunities to reduce static power.
AB - We present Bus Switching Activity Analyser (BSAA), a switching activity analysis and visualisation tool for SoC power optimisation. BSAA reads switching metrics from RTL simulation, reporting the most active buses and hierarchies. Buses with typical address and data bus traffic are identified automatically. The tool can process multiple simulation runs simultaneously, analysing how switching varies with input data or software code. BSAA complements commercial tools, helping the designer find opportunities to apply power-saving techniques. To illustrate BSAA's powerful features, we analyse switching in an MP3 decoder design using several audio inputs and in a microcontroller running a suite of software tasks. We demonstrate the tool's usefulness by applying it in the power optimisation of a small MPSoC, obtaining on average a 60% reduction in dynamic power across five software tasks and identifying opportunities to reduce static power.
UR - http://www.scopus.com/inward/record.url?scp=77951103140&partnerID=8YFLogxK
U2 - 10.1007/978-3-642-11802-9_26
DO - 10.1007/978-3-642-11802-9_26
M3 - Conference Proceeding
AN - SCOPUS:77951103140
SN - 3642118011
SN - 9783642118012
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 216
EP - 226
BT - Integrated Circuit and System Design
Y2 - 9 September 2009 through 11 September 2009
ER -