Application of selective SiGe epitaxy for recessed source/drain of PMOS transistor

We have investigated various aspects of recessed source/drain technology: selective epitaxy, recess etch, integration schemes, and stress simulation. Selectively grown in-situ boron doped SiGe epitaxial layers show almost 100% dopant activation without any subsequent thermal treatment, junction abruptness of < 3 nm/decade, and resistivity of < 0.001 Ω cm. Si etch processes for forming recessed areas with different etch shapes have been developed and impact of the recess etch shape and depth on the channel stress was modeled using computer simulations. Optimized Si etch and post etch cleaning process allows us to grow SiGe epitaxial layers with no change of the pre-epitaxy in-situ cleaning thermal budget. Also, effects of boron implantation and rapid thermal anneal on properties of SiGe epitaxial layers have been investigated.