An enhanced compact waffle MOSFET for RF integrated circuits

Sang Lam, Wing Hung Ki, P. K. Ko, Mansun Chan

Research output: Chapter in Book or Report/Conference proceedingConference Proceedingpeer-review

2 Citations (Scopus)

Abstract

Several layout methods have been proposed to increase the compactness of a MOSFET. Among the methods, the waffle layout has been mentioned most in the literature. Nevertheless, it has not been commonly used since its inception. This is simply due to the deficiencies associated with the traditional waffle layout in submicron CMOS technology. In this paper, an enhanced compact and expandable waffle MOSFET for RF circuits is designed and tested. Compared with the multifinger design, the area-efficient waffle MOSFET gives better performance of about 20% higher cut-off frequencies and 2 dB higher RF amplification gain with its compact layout structure.

Original languageEnglish
Title of host publication60th Device Research Conference, DRC 2002
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages73-74
Number of pages2
ISBN (Electronic)0780373170
DOIs
Publication statusPublished - 2002
Externally publishedYes
Event60th Device Research Conference, DRC 2002 - Santa Barbara, United States
Duration: 24 Jun 200226 Jun 2002

Publication series

NameDevice Research Conference - Conference Digest, DRC
Volume2002-January
ISSN (Print)1548-3770

Conference

Conference60th Device Research Conference, DRC 2002
Country/TerritoryUnited States
CitySanta Barbara
Period24/06/0226/06/02

Keywords

  • CMOS process
  • CMOS technology
  • Circuit testing
  • Fingers
  • MOSFET circuits
  • Parasitic capacitance
  • Performance gain
  • Radio frequency
  • Radiofrequency integrated circuits
  • Transconductance

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