AES S-box using Fermat's Little Theorem for the highly constrained embedded devices

M. M. Wong*, M. L.D. Wong, A. K. Nandi, I. Hijazin

*Corresponding author for this work

Research output: Chapter in Book or Report/Conference proceedingConference Proceedingpeer-review

3 Citations (Scopus)

Abstract

The recent increase of resource-constrained embedded devices have led to the need of lightweight cryptography. Therefore, the design of secure communication algorithms that fit in this highly constrained environments has become a fundamental issue in cryptographic circuit design. In this paper, we propose an optimization methodology that would efficiently reduces the code size of the S-box, the most expensive operation of the Advanced Encryption Standard (AES). Here, we perform a study on composite field AES S-box constructed using an inversion algorithm based on Fermat's Little Theorem (FLT). Consequently, we derive two AES S-box constructions over the fields GF((24) 2) and GF((22)4) respectively. Our methodology results in smaller computational cost compared to the conventional Look-up Table (LUT) method, which is commonly deployed on microcontrollers.

Original languageEnglish
Title of host publicationProceedings of the 20th European Signal Processing Conference, EUSIPCO 2012
Pages1039-1043
Number of pages5
Publication statusPublished - 2012
Event20th European Signal Processing Conference, EUSIPCO 2012 - Bucharest, Romania
Duration: 27 Aug 201231 Aug 2012

Publication series

NameEuropean Signal Processing Conference
ISSN (Print)2219-5491

Conference

Conference20th European Signal Processing Conference, EUSIPCO 2012
Country/TerritoryRomania
CityBucharest
Period27/08/1231/08/12

Keywords

  • Advanced Encryption Standard (AES)
  • Fermat's Little Theorem (FLT)
  • S-box
  • lightweight implementation
  • microcontroller (MCU)

Fingerprint

Dive into the research topics of 'AES S-box using Fermat's Little Theorem for the highly constrained embedded devices'. Together they form a unique fingerprint.

Cite this