A switching activity analysis and visualisation tool for power optimisation of SoC buses

Tom English*, Ka Lok Man, Emanuel Popovici

*Corresponding author for this work

Research output: Chapter in Book or Report/Conference proceedingConference Proceedingpeer-review

4 Citations (Scopus)

Abstract

As part of our ongoing research, we present BSAA - Bus Switching Activity Analyser - a CAD tool which reads switching activity from RTL simulation, extracting a list of the circuit's buses and associated switching activity metrics. The list is filtered and sorted according to user-specified criteria, producing reports and a set of graphical switching activity profiles of the circuit's most active buses. The tool identifies common profiles corresponding to typical address- and data bus traffic. As part of a CAD flow, BSAA enables rapid switching activity analysis and encoding design for switching minimization on heavily-loaded cross-chip buses and IO pins.

Original languageEnglish
Title of host publication2009 Ph.D. Research in Microelectronics and Electronics, PRIME 2009
Pages264-267
Number of pages4
DOIs
Publication statusPublished - 2009
Externally publishedYes
Event2009 Ph.D. Research in Microelectronics and Electronics, PRIME 2009 - Cork, Ireland
Duration: 12 Jul 200917 Jul 2009

Publication series

Name2009 Ph.D. Research in Microelectronics and Electronics, PRIME 2009

Conference

Conference2009 Ph.D. Research in Microelectronics and Electronics, PRIME 2009
Country/TerritoryIreland
CityCork
Period12/07/0917/07/09

Fingerprint

Dive into the research topics of 'A switching activity analysis and visualisation tool for power optimisation of SoC buses'. Together they form a unique fingerprint.

Cite this