TY - JOUR
T1 - A soft-switching post-regulator for multi-outputs dual forward dc/dc converter with tight output voltage regulation
AU - Su, Bin
AU - Wen, Huiqing
AU - Zhang, Junming
AU - Lu, Zhengyu
PY - 2013
Y1 - 2013
N2 - An improved soft-switching post-regulator topology for multi-outputs dual forward DC/DC converter is presented. A delay-trailing modulation method is proposed. ZVSZCS on/zero-current-switching offconditions can be realised on both the primary MOSFETs and the secondary rectifying diodes. Excellent decoupling among different outputs and tight output voltage regulation are achieved. The efficiency is improved due to single power-conversion stage and share in the primary components. The operating principle and main feature of this improved topology are analysed. Key design issue including zero-voltageswitching operation, maximum duty ratio of the primary side MOSFETs and parameter determination for the primary magnetising inductor and the secondary additional redistribution capacitor are discussed. Finally, an experimental prototype with two outputs (300-400 V input, 48 V, 6.5 A and 24 V, 11 A outputs) is built to verify the theoretical analysis. The measured efficiency at normal operation input voltage (400 V) is improved by about 0.5-2%, and the measured efficiency under light loads is improved by more than 2%
AB - An improved soft-switching post-regulator topology for multi-outputs dual forward DC/DC converter is presented. A delay-trailing modulation method is proposed. ZVSZCS on/zero-current-switching offconditions can be realised on both the primary MOSFETs and the secondary rectifying diodes. Excellent decoupling among different outputs and tight output voltage regulation are achieved. The efficiency is improved due to single power-conversion stage and share in the primary components. The operating principle and main feature of this improved topology are analysed. Key design issue including zero-voltageswitching operation, maximum duty ratio of the primary side MOSFETs and parameter determination for the primary magnetising inductor and the secondary additional redistribution capacitor are discussed. Finally, an experimental prototype with two outputs (300-400 V input, 48 V, 6.5 A and 24 V, 11 A outputs) is built to verify the theoretical analysis. The measured efficiency at normal operation input voltage (400 V) is improved by about 0.5-2%, and the measured efficiency under light loads is improved by more than 2%
UR - http://www.scopus.com/inward/record.url?scp=84881505257&partnerID=8YFLogxK
U2 - 10.1049/iet-pel.2012.0516
DO - 10.1049/iet-pel.2012.0516
M3 - Article
AN - SCOPUS:84881505257
SN - 1755-4535
VL - 6
SP - 1069
EP - 1077
JO - IET Power Electronics
JF - IET Power Electronics
IS - 6
ER -