A Real-Time Face Recognition System by Efficient Hardware-Software Co-Design on FPGA SoCs

Hao Wang, Shan Cao, Shugong Xu

Research output: Chapter in Book or Report/Conference proceedingConference Proceedingpeer-review

3 Citations (Scopus)

Abstract

With the development of deep learning, the accuracy of face recognition has been significantly improved. Current face recognition systems are mostly designed for CPU or GPU platforms, and faces significant latency and power constraints when migrated to embedded devices. In this live demonstration, a real-Time face recognition system based on FPGA System-on-Chip (SoC) platforms is presented. To achieve real-Time processing, the face recognition algorithm based on convolutional neural network is optimized first to a hardware-friendly network model and is accelerated on FPGA, while the face detection and face alignment are implemented on ARM. The latency of the entire system is 52 ms, and the face recognition accuracy on the LWF data set reaches 99.05%.

Original languageEnglish
Title of host publication2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems, AICAS 2021
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665419130
DOIs
Publication statusPublished - 6 Jun 2021
Externally publishedYes
Event3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2021 - Washington, United States
Duration: 6 Jun 20219 Jun 2021

Publication series

Name2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems, AICAS 2021

Conference

Conference3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2021
Country/TerritoryUnited States
CityWashington
Period6/06/219/06/21

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