A pre-RTL simulator for neural networks

Shan Cao; Zhenyi Bao; Chengbo Xue; Wei Deng; Shugong Xu; Shunqing Zhang

doi:10.1109/ISCAS.2019.8702495

A pre-RTL simulator for neural networks

Shan Cao, Zhenyi Bao, Chengbo Xue, Wei Deng, Shugong Xu, Shunqing Zhang

Research output: Chapter in Book or Report/Conference proceeding › Conference Proceeding › peer-review

Abstract

In this paper, a pre-RTL neural network simulator (SimuNN) is proposed which is initiated as the bridge between the algorithm design and hardware implementation of neural networks. SimuNN is compatible with TensorFlow interface, and supports inference in both floating-point numbers and configurable fixed-point numbers. It can provide inference results at layer-/module-/cycle-level to serve as a golden model for RTL designs. Besides, its embedded model for hardware performance estimation enables SimuNN to provide an accurate reference of processing speed and hardware cost at the ASIC-designed user end for algorithm designers.

Original language	English
Title of host publication	2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728103976
DOIs	https://doi.org/10.1109/ISCAS.2019.8702495
Publication status	Published - 2019
Externally published	Yes
Event	2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Sapporo, Japan Duration: 26 May 2019 → 29 May 2019

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	2019-May
ISSN (Print)	0271-4310

Conference

Conference	2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
Country/Territory	Japan
City	Sapporo
Period	26/05/19 → 29/05/19

Keywords

Neural network
Performance modeling
Pre-RTL
Simulator

Access to Document

10.1109/ISCAS.2019.8702495

Cite this

Cao, S., Bao, Z., Xue, C., Deng, W., Xu, S., & Zhang, S. (2019). A pre-RTL simulator for neural networks. In 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings Article 8702495 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2019-May). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2019.8702495

@inproceedings{78af349f71e14047bcde7c1ab4236d92,

title = "A pre-RTL simulator for neural networks",

abstract = "In this paper, a pre-RTL neural network simulator (SimuNN) is proposed which is initiated as the bridge between the algorithm design and hardware implementation of neural networks. SimuNN is compatible with TensorFlow interface, and supports inference in both floating-point numbers and configurable fixed-point numbers. It can provide inference results at layer-/module-/cycle-level to serve as a golden model for RTL designs. Besides, its embedded model for hardware performance estimation enables SimuNN to provide an accurate reference of processing speed and hardware cost at the ASIC-designed user end for algorithm designers.",

keywords = "Neural network, Performance modeling, Pre-RTL, Simulator",

author = "Shan Cao and Zhenyi Bao and Chengbo Xue and Wei Deng and Shugong Xu and Shunqing Zhang",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE; 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 ; Conference date: 26-05-2019 Through 29-05-2019",

year = "2019",

doi = "10.1109/ISCAS.2019.8702495",

language = "English",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings",

}

Cao, S, Bao, Z, Xue, C, Deng, W, Xu, S & Zhang, S 2019, A pre-RTL simulator for neural networks. in 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings., 8702495, Proceedings - IEEE International Symposium on Circuits and Systems, vol. 2019-May, Institute of Electrical and Electronics Engineers Inc., 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, 26/05/19. https://doi.org/10.1109/ISCAS.2019.8702495

A pre-RTL simulator for neural networks. / Cao, Shan; Bao, Zhenyi; Xue, Chengbo et al.
2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2019. 8702495 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2019-May).

Research output: Chapter in Book or Report/Conference proceeding › Conference Proceeding › peer-review

TY - GEN

T1 - A pre-RTL simulator for neural networks

AU - Cao, Shan

AU - Bao, Zhenyi

AU - Xue, Chengbo

AU - Deng, Wei

AU - Xu, Shugong

AU - Zhang, Shunqing

PY - 2019

Y1 - 2019

N2 - In this paper, a pre-RTL neural network simulator (SimuNN) is proposed which is initiated as the bridge between the algorithm design and hardware implementation of neural networks. SimuNN is compatible with TensorFlow interface, and supports inference in both floating-point numbers and configurable fixed-point numbers. It can provide inference results at layer-/module-/cycle-level to serve as a golden model for RTL designs. Besides, its embedded model for hardware performance estimation enables SimuNN to provide an accurate reference of processing speed and hardware cost at the ASIC-designed user end for algorithm designers.

AB - In this paper, a pre-RTL neural network simulator (SimuNN) is proposed which is initiated as the bridge between the algorithm design and hardware implementation of neural networks. SimuNN is compatible with TensorFlow interface, and supports inference in both floating-point numbers and configurable fixed-point numbers. It can provide inference results at layer-/module-/cycle-level to serve as a golden model for RTL designs. Besides, its embedded model for hardware performance estimation enables SimuNN to provide an accurate reference of processing speed and hardware cost at the ASIC-designed user end for algorithm designers.

KW - Neural network

KW - Performance modeling

KW - Pre-RTL

KW - Simulator

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U2 - 10.1109/ISCAS.2019.8702495

DO - 10.1109/ISCAS.2019.8702495

M3 - Conference Proceeding

AN - SCOPUS:85066786710

T3 - Proceedings - IEEE International Symposium on Circuits and Systems

BT - 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019

Y2 - 26 May 2019 through 29 May 2019

ER -

A pre-RTL simulator for neural networks

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Keywords

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