A Compact Multi-Bit Multi-Order FIR DAC Design for Internet of Things

Shenjian Zhang, Chun Zhao, Yuxin Guan, Kai Tang, Junyan Li, Rui Li, Yun Fang, Hao Gao

Research output: Chapter in Book or Report/Conference proceedingConference Proceedingpeer-review

Abstract

This work presents a compact multi-bit multi-order finite impulse response (FIR) digital-to-analog converter (DAC) design for internet of things (IoT). It is accomplished in 65-nm CMOS technology merging the 4-order FIR filter and 4-bit calibration-free DAC as one block. This FIR DAC achieves over -20-dB out-band noise filtering with 0-dBFS in-band signal input, and demonstrates a maximum integral nonlinearity (INL) and differential nonlinearity (DNL) of 0.26% and 0.12% in 502.5-mV full-scale range while consuming a power of 0.53-mW and occupying 0.052-mm2 area.

Original languageEnglish
Title of host publication2025 IEEE 16th Latin American Symposium on Circuits and Systems, LASCAS 2025 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798331522124
DOIs
Publication statusPublished - 2025
Event16th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2025 - Bento Goncalves, Brazil
Duration: 25 Feb 202528 Feb 2025

Publication series

Name2025 IEEE 16th Latin American Symposium on Circuits and Systems, LASCAS 2025 - Proceedings

Conference

Conference16th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2025
Country/TerritoryBrazil
CityBento Goncalves
Period25/02/2528/02/25

Keywords

  • digital-to-analog converter (DAC)
  • finite impulse response (FIR)
  • internet of things (IoT)
  • nonlinearity (NL)
  • signal-to-noise ratio (SNR)
  • signal-to-noise-and-distortion ratio (SINAD)

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