SystemCFL: Formal specification and analysis of hardware /software co-designs

Ka L. Man*

*Corresponding author for this work

Research output: Contribution to journalReview articlepeer-review

3 Citations (Scopus)


SystemCFL is a formal language for hardware/software co-design. Principally, SystemCFL is the formalization of SystemC based on classical process algebra ACP. The language is aimed to give formal specification of SystemC designs and perform formal analysis of SystemC processes. Furthermore, SystemCFL is a single-formalism that can be specifically used for specifying concurrent systems, finite state systems and real-time systems. Desired properties of these systems modeled in SystemCFL can be verified with existing formal verification tools by translating them formally into different formalisms that are the input languages of the formal verification tools. This paper provides an overview of SystemCFL and shows some practical applications of SystemCFL.

Original languageEnglish
Pages (from-to)361-368
Number of pages8
JournalWSEAS Transactions on Circuits and Systems
Issue number3
Publication statusPublished - Mar 2006
Externally publishedYes


  • Formal semantics
  • Formal verification
  • Hardware/software co-designs
  • SystemC
  • SystemC

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