TY - GEN
T1 - Efficient matrix inversion architecture for linear detection in massive MIMO systems
AU - Wang, Feng
AU - Zhang, Chuan
AU - Yang, Junmei
AU - Liang, Xiao
AU - You, Xiaohu
AU - Xu, Shugong
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2015/9/9
Y1 - 2015/9/9
N2 - Resulted by the hundreds of antennas at the base-station (BS) side, the dimension of matrices involved in linear detection for massive multiple-input multiple-output (MIMO) uplink systems increases drastically. Being an indispensable part of linear detection, the matrix inversion suffers a lot from the huge matrix size of massive MIMO, and therefore becomes inefficient for realization. By achieving good tradeoff between complexity and performance, approximate matrix inversion via Neumann series now boosts one promising solution for linear detection of massive MIMO systems. In this paper, an efficient hardware architecture for approximate matrix inversion is proposed. This architecture is hardware efficient and suitable for various applications with different approximation precisions. FPGA implementation results of matrix inversion for 4 × 32 massive MIMO system have shown that the proposed architecture can achieve 56.7% higher frequency with only 58.9% hardware resources of its existing counterparts. Look-ahead transformations which can make the proposed architecture more suitable for high speed applications are also mentioned.
AB - Resulted by the hundreds of antennas at the base-station (BS) side, the dimension of matrices involved in linear detection for massive multiple-input multiple-output (MIMO) uplink systems increases drastically. Being an indispensable part of linear detection, the matrix inversion suffers a lot from the huge matrix size of massive MIMO, and therefore becomes inefficient for realization. By achieving good tradeoff between complexity and performance, approximate matrix inversion via Neumann series now boosts one promising solution for linear detection of massive MIMO systems. In this paper, an efficient hardware architecture for approximate matrix inversion is proposed. This architecture is hardware efficient and suitable for various applications with different approximation precisions. FPGA implementation results of matrix inversion for 4 × 32 massive MIMO system have shown that the proposed architecture can achieve 56.7% higher frequency with only 58.9% hardware resources of its existing counterparts. Look-ahead transformations which can make the proposed architecture more suitable for high speed applications are also mentioned.
KW - FPGA
KW - iterative computation
KW - Massive MIMO
KW - matrix inversion
KW - VLSI
UR - http://www.scopus.com/inward/record.url?scp=84961318654&partnerID=8YFLogxK
U2 - 10.1109/ICDSP.2015.7251869
DO - 10.1109/ICDSP.2015.7251869
M3 - Conference Proceeding
AN - SCOPUS:84961318654
T3 - International Conference on Digital Signal Processing, DSP
SP - 248
EP - 252
BT - 2015 IEEE International Conference on Digital Signal Processing, DSP 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - IEEE International Conference on Digital Signal Processing, DSP 2015
Y2 - 21 July 2015 through 24 July 2015
ER -