Analysis and minimisation of DC bus surge voltage for electric vehicle applications

In electrical vehicle driving systems, the DC bus usually shows large surge voltages because of the presence of loop parasitic inductance and hard-switching operations of voltage source inverters. The unexpected transient overvoltage mostly accounts for switching devices failures. To guarantee system reliability, high-voltage-rating insulated-gate-bipolar-transistors (IGBTs) are commonly used in practical systems to accommodate potential surge voltages. This eventually results in the increase of power loss and system cost. A comprehensive study is presented in this study to minimise the surge voltage across the DC bus. It starts with a surge voltage model indicating that the commutation loop inductances and the switching dynamics are two critical contributors to voltage spikes. An optimal design approach to lower the stray inductance of the connecting busbar is presented. Considering the characteristics of electric vehicle (EV) inverters controlled by space vector modulation, a slew-rate limiter strategy is proposed to minimise the surge voltage. The low inductance busbar design and control strategy are validated by simulation and experimental test.