A Compact High-Isolation V-Band Millimeter Wave Wilkinson Power Divider Design in 65-nm CMOS Process

Hongyu Bao*, Sang Lam*

*Corresponding author for this work

Research output: Chapter in Book or Report/Conference proceedingConference Proceedingpeer-review

Abstract

Slim on-chip transmission lines of a quasi-rectangular coaxial structure are used to construct a 2-way Wilkinson power divider for millimeter-wave integrated circuits (ICs) in the V-band. With the ground-shielding metal layers surrounding the central core, a meandered design is adopted for the two quarter-wavelength transmission line segments and makes the power divider very compact. It also provides very high signal isolation from neighbouring devices and the resistive semiconductor substrate. In a 65-nm CMOS process, the power divider design occupies a chip area of only 285 × 67 μm2 (≈ 0.019 mm2). A low power loss and a very high isolation between the output ports are maintained in a frequency range from 50 to 75 GHz, achieving |S21| = -3.95 dB (with the 3 dB power division loss included), |S23| = -29 dB and |S11| = -29.5 dB, all at 60 GHz.

Original languageEnglish
Title of host publication2023 International Conference on Microwave and Millimeter Wave Technology, ICMMT 2023 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350338874
DOIs
Publication statusPublished - 2023
Event15th International Conference on Microwave and Millimeter Wave Technology, ICMMT 2023 - Qingdao, China
Duration: 14 May 202317 May 2023

Publication series

Name2023 International Conference on Microwave and Millimeter Wave Technology, ICMMT 2023 - Proceedings

Conference

Conference15th International Conference on Microwave and Millimeter Wave Technology, ICMMT 2023
Country/TerritoryChina
CityQingdao
Period14/05/2317/05/23

Keywords

  • V-band
  • Wilkinson power divider
  • millimeter-wave CMOS design
  • mm-wave ICs
  • monolithic microwave integrated circuits
  • on-chip transmission line
  • power combiner

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