VLSI macromodeling and signal integrity analysis via digital signal processing techniques

Linear macromodeling has been applied to high-frequency circuit simulations to accelerate the global interconnect system simulation process. By approximating tabulated structure response data, reduced macromodels can be generated. However, conventional macromodeling approaches suffer from numerical robustness and convergence problems. This paper aims to apply digital signal processing techniques to facilitate the macromodeling process. Besides improving the existing widely adopted framework (called VFz) through introducing a robust discrete-time domain (z-domain) computation, alternative macromodeling methodology (called VISA) has also been developed, which significantly simplifies the computation procedure. Furthermore, universal pre-processing technique (frequency warping) is introduced for a numerically favorable computation of the macromodeling process. These techniques have been shown to significantly improve the robustness and convergence of the modeling process.