TY - GEN
T1 - Topology Optimization of Manifold Microchannel Heat Sink for Multichip Power Modules
AU - Liu, Sanli
AU - Chen, Min
AU - Xiang, Zhouyi
AU - Wang, Xiang
AU - Zhu, Nan
AU - Liang, Yiming
AU - Zhang, Yucheng
N1 - Publisher Copyright:
© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2025.
PY - 2025
Y1 - 2025
N2 - The high power density and high integration of power electronics impose greater demands on cooling systems. Inefficient cooling can lead to overheating failure, performance degradation, and shortened life. In this study, a multi-objective topology optimization (TO) is utilized to optimize the manifold heat sink for multichip power modules (MCPMs). The non-uniform temperature distribution obtained from thermal analysis is used as the accurate loading constraint for topological fin design. The optimized designs are compared with the conventional parallel fins and pin fins through numerical simulation analysis. The results indicate that the conventional parallel fins and pin fins show higher chip temperature, while topological fins maintain significantly lower chip temperature. Topological fins using a non-uniform heat source achieve the best heat dissipation, reducing chip temperatures by 5 ℃ compared to pin fins and nearly 10 ℃ compared to parallel fins. Additionally, the minimum temperature deviation between the chips demonstrates high temperature uniformity. Topology optimization enhances the heat dissipation capability of manifold heat sinks with a moderate increase in pressure drop. Considering the real, accurate non-uniform heat sources can achieve better overall performance.
AB - The high power density and high integration of power electronics impose greater demands on cooling systems. Inefficient cooling can lead to overheating failure, performance degradation, and shortened life. In this study, a multi-objective topology optimization (TO) is utilized to optimize the manifold heat sink for multichip power modules (MCPMs). The non-uniform temperature distribution obtained from thermal analysis is used as the accurate loading constraint for topological fin design. The optimized designs are compared with the conventional parallel fins and pin fins through numerical simulation analysis. The results indicate that the conventional parallel fins and pin fins show higher chip temperature, while topological fins maintain significantly lower chip temperature. Topological fins using a non-uniform heat source achieve the best heat dissipation, reducing chip temperatures by 5 ℃ compared to pin fins and nearly 10 ℃ compared to parallel fins. Additionally, the minimum temperature deviation between the chips demonstrates high temperature uniformity. Topology optimization enhances the heat dissipation capability of manifold heat sinks with a moderate increase in pressure drop. Considering the real, accurate non-uniform heat sources can achieve better overall performance.
KW - Direct liquid cooling
KW - Multichip power module
KW - Power electronics
KW - Thermal management
KW - Topology optimization
UR - http://www.scopus.com/inward/record.url?scp=105000819694&partnerID=8YFLogxK
U2 - 10.1007/978-981-96-2456-0_18
DO - 10.1007/978-981-96-2456-0_18
M3 - Conference Proceeding
AN - SCOPUS:105000819694
SN - 9789819624553
T3 - Lecture Notes in Electrical Engineering
SP - 167
EP - 176
BT - Proceedings of 2024 International Conference on Smart Electrical Grid and Renewable Energy, SEGRE 2024 - Volume 1
A2 - Wen, Fushuan
A2 - Liu, Haoming
A2 - Wen, Huiqing
A2 - Wang, Shunli
PB - Springer Science and Business Media Deutschland GmbH
T2 - 2nd International Conference on Smart Electrical Grid and Renewable Energy, SEGRE 2024
Y2 - 9 August 2024 through 12 August 2024
ER -