Re-Oxidation-Induced Asymmetric Reliability in Annealed SiC MOS Devices

  • Zhaoyi Wang
  • , Santai Xu
  • , Zijie Lin
  • , Anyu Shen
  • , Xi Chen
  • , Wen Liu*
  • *Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

This study systematically investigates the impact of re-oxidation during post-oxidation annealing (POA) on 4H-SiC MOS device stability through breakdown and bias temperature instability (BTI) tests, comparing high-temperature N2O annealing and low-temperature O2 annealing. Both annealing methods reduce leakage current and improve dielectric breakdown strength, demonstrating that re-oxidation effectively suppresses electron traps at the SiO2/SiC interface and increases the conduction band offset. Positive bias temperature instability (PBTI) results confirm improved positive bias temperature stability. However, negative bias temperature instability (NBTI) reveals degraded stability under negative bias, attributed to oxygen vacancy formation during unfavorable re-oxidation conditions, which introduces detrimental hole traps. These findings demonstrate that re-oxidation-based annealing adversely affects long-term high-temperature reliability, providing critical guidance for annealing process selection in SiC power devices.

Original languageEnglish
JournalIEEE Transactions on Device and Materials Reliability
DOIs
Publication statusAccepted/In press - 2025

Keywords

  • hole traps
  • MOS capacitor
  • NBTI
  • PBTI
  • re-oxidation
  • SiC

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