Monolithic Integrated GaN Complementary Logic Circuits Using AlON/Al₂O₃ Bilayer Gate Dielectric

This article reports the monolithic integration of gallium nitride (GaN)-based complementary logic (CL) circuits using MIS-gated p/n-FETs on a p-GaN/UIDGaN/AlGaN/GaN platform. By employing a bilayer gate dielectric stack (2 nm PEALD AlON/18 nm ALD Al₂O₃), the MIS-gated n-FET achieves enhanced gate breakdown and negligible leakage over a wide V_GS range (−2 to 10 V). Time-dependent dielectric breakdown (TDDB)-based lifetime modeling predicts a maximum operating V_GS of 6.75 V for 10-year reliability. Furthermore, the optimized p-FET exhibits a high I_on/i_off ratio exceeding 10⁸ , an enhancementmode (E-mode) threshold voltage (V_TH) of −0.5 V, and a peak I_on of 10.6 mA/mm. The resulting GaN-based CL inverter demonstrates a large 11-V gate swing, rail-to-rail output, and well-matched n/p-FET current density, offering a robust solution for GaN-based power integrated circuit (IC) integration.