Abstract
In this work, dual-gate enhancement-mode (E-mode) device based NAND circuit (DG-NAND) and the NAND block with double E-mode devices (DD-NAND) are developed and fabricated based on the GaN MIS-HEMTs (metal-insulator-semiconductor-high-electron-mobility-transistors) platform. The DG-NAND circuit has an area of 0.118 mm2 with the probe pad, which is 24% lower than the area of the DD-NAND circuit. Both static and dynamic experimental results validate the advantages of performance improvement of NAND circuits designed by dual-gate technology at an input voltage of 9 V. This paper demonstrates the design potential of dual-gate NAND in an all-GaN MIS-HEMTs platform through compact design.
| Original language | English |
|---|---|
| Pages (from-to) | 230-234 |
| Number of pages | 5 |
| Journal | IEEE Journal of the Electron Devices Society |
| Volume | 11 |
| DOIs | |
| Publication status | Published - 2023 |
Keywords
- GaN
- Logic circuits
- MIS-HEMTs
- dual-gate E-mode device
- monolithic integration
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