Design, analysis, tools and applications for programmable high-speed and power-aware 4G processors

Ka Lok Man; Chi Un Lei; Jieming Ma; Yanyan Wu; Sheng Uei Guan; T. T. Jeong; J. K. Seon; Yunsik Lee

doi:10.1109/isocc.2011.6138775

Design, analysis, tools and applications for programmable high-speed and power-aware 4G processors

Ka Lok Man^*
, Chi Un Lei
, Jieming Ma
, Yanyan Wu
, Sheng Uei Guan
, T. T. Jeong
, J. K. Seon
, Yunsik Lee

^*Corresponding author for this work

The University of Hong Kong
University of Liverpool
Myongji University
LG Corporation
Korea Electronics Technology Institute

Research output: Chapter in Book or Report/Conference proceeding › Conference Proceeding › peer-review

1 Citation (Scopus)

Abstract

Data rate traffic and communication capacity demand have been increased continuously. Therefore, a highly advanced 4G wireless system is required to meet a high demand for modern mobile terminals. For getting a further improvement for 4G communication systems, new paradigms of design, analysis tools and applications for 4G communication processors are necessary. In this paper, some of these new paradigms are discussed. Furthermore, a single-step discrete cosine transform truncation (DCTT) method is proposed for the modeling-simulation in signal integrity verification for high-speed communication processors.

Original language	English
Title of host publication	2011 International SoC Design Conference, ISOCC 2011
Publisher	IEEE Computer Society
Pages	321-324
Number of pages	4
ISBN (Print)	9781457707100
DOIs	https://doi.org/10.1109/isocc.2011.6138775
Publication status	Published - 2011
Event	8th International SoC Design Conference 2011, ISOCC 2011 - Jeju, Korea, Republic of Duration: 17 Nov 2011 → 18 Nov 2011

Publication series

Name	2011 International SoC Design Conference, ISOCC 2011

Conference

Conference	8th International SoC Design Conference 2011, ISOCC 2011
Country/Territory	Korea, Republic of
City	Jeju
Period	17/11/11 → 18/11/11

Keywords

Circuit design
Communication systems
High speed
LTE
Low power
Signal integrity

Access to Document

10.1109/isocc.2011.6138775

Cite this

Man, K. L., Lei, C. U., Ma, J., Wu, Y., Guan, S. U., Jeong, T. T., Seon, J. K., & Lee, Y. (2011). Design, analysis, tools and applications for programmable high-speed and power-aware 4G processors. In 2011 International SoC Design Conference, ISOCC 2011 (pp. 321-324). (2011 International SoC Design Conference, ISOCC 2011). IEEE Computer Society. https://doi.org/10.1109/isocc.2011.6138775

@inproceedings{b7ed6acdd90f4907bce36cd1d93629a6,

title = "Design, analysis, tools and applications for programmable high-speed and power-aware 4G processors",

abstract = "Data rate traffic and communication capacity demand have been increased continuously. Therefore, a highly advanced 4G wireless system is required to meet a high demand for modern mobile terminals. For getting a further improvement for 4G communication systems, new paradigms of design, analysis tools and applications for 4G communication processors are necessary. In this paper, some of these new paradigms are discussed. Furthermore, a single-step discrete cosine transform truncation (DCTT) method is proposed for the modeling-simulation in signal integrity verification for high-speed communication processors.",

keywords = "Circuit design, Communication systems, High speed, LTE, Low power, Signal integrity",

author = "Man, \{Ka Lok\} and Lei, \{Chi Un\} and Jieming Ma and Yanyan Wu and Guan, \{Sheng Uei\} and Jeong, \{T. T.\} and Seon, \{J. K.\} and Yunsik Lee",

year = "2011",

doi = "10.1109/isocc.2011.6138775",

language = "English",

isbn = "9781457707100",

series = "2011 International SoC Design Conference, ISOCC 2011",

publisher = "IEEE Computer Society",

pages = "321--324",

booktitle = "2011 International SoC Design Conference, ISOCC 2011",

note = "8th International SoC Design Conference 2011, ISOCC 2011 ; Conference date: 17-11-2011 Through 18-11-2011",

}

Man, KL, Lei, CU, Ma, J, Wu, Y, Guan, SU, Jeong, TT, Seon, JK & Lee, Y 2011, Design, analysis, tools and applications for programmable high-speed and power-aware 4G processors. in 2011 International SoC Design Conference, ISOCC 2011. 2011 International SoC Design Conference, ISOCC 2011, IEEE Computer Society, pp. 321-324, 8th International SoC Design Conference 2011, ISOCC 2011, Jeju, Korea, Republic of, 17/11/11. https://doi.org/10.1109/isocc.2011.6138775

Design, analysis, tools and applications for programmable high-speed and power-aware 4G processors. / Man, Ka Lok; Lei, Chi Un; Ma, Jieming et al.
2011 International SoC Design Conference, ISOCC 2011. IEEE Computer Society, 2011. p. 321-324 (2011 International SoC Design Conference, ISOCC 2011).

Research output: Chapter in Book or Report/Conference proceeding › Conference Proceeding › peer-review

TY - GEN

T1 - Design, analysis, tools and applications for programmable high-speed and power-aware 4G processors

AU - Man, Ka Lok

AU - Lei, Chi Un

AU - Ma, Jieming

AU - Wu, Yanyan

AU - Guan, Sheng Uei

AU - Jeong, T. T.

AU - Seon, J. K.

AU - Lee, Yunsik

PY - 2011

Y1 - 2011

N2 - Data rate traffic and communication capacity demand have been increased continuously. Therefore, a highly advanced 4G wireless system is required to meet a high demand for modern mobile terminals. For getting a further improvement for 4G communication systems, new paradigms of design, analysis tools and applications for 4G communication processors are necessary. In this paper, some of these new paradigms are discussed. Furthermore, a single-step discrete cosine transform truncation (DCTT) method is proposed for the modeling-simulation in signal integrity verification for high-speed communication processors.

AB - Data rate traffic and communication capacity demand have been increased continuously. Therefore, a highly advanced 4G wireless system is required to meet a high demand for modern mobile terminals. For getting a further improvement for 4G communication systems, new paradigms of design, analysis tools and applications for 4G communication processors are necessary. In this paper, some of these new paradigms are discussed. Furthermore, a single-step discrete cosine transform truncation (DCTT) method is proposed for the modeling-simulation in signal integrity verification for high-speed communication processors.

KW - Circuit design

KW - Communication systems

KW - High speed

KW - LTE

KW - Low power

KW - Signal integrity

UR - https://www.scopus.com/pages/publications/84863126454

U2 - 10.1109/isocc.2011.6138775

DO - 10.1109/isocc.2011.6138775

M3 - Conference Proceeding

AN - SCOPUS:84863126454

SN - 9781457707100

T3 - 2011 International SoC Design Conference, ISOCC 2011

SP - 321

EP - 324

BT - 2011 International SoC Design Conference, ISOCC 2011

PB - IEEE Computer Society

T2 - 8th International SoC Design Conference 2011, ISOCC 2011

Y2 - 17 November 2011 through 18 November 2011

ER -

Design, analysis, tools and applications for programmable high-speed and power-aware 4G processors

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Keywords

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