Comprehensive study of dynamic on-resistance in AlGaN/GaN MIS-HEMTs with partially recessed-gate

Although partially recessed-gate AlGaN/GaN MIS-HEMTs are promising for circuit applications, the mechanisms responsible for on-resistance degradation under off-state with high drain bias remain unclear. In this work, trap states located in the gate dielectric, at the dielectric/III–V material interface, within the AlGaN barrier, and in the UID-GaN buffer are individually investigated to clarify their respective contributions to the degradation behavior. Bidirectional C–V sweeps at 100 kHz show a small voltage hysteresis (<0.3 V) and a low gate leakage current of 10 nA/mm, indicating a high-quality gate dielectric with minimal native oxygen-related defects. Multi-frequency C–V measurements (1 kHz–1 MHz) reveal that the trap density (D_it) at the Si₃N₄/AlGaN interface ranges from 2.07×10¹³ to 5.4×10¹³ cm⁻² eV⁻¹ over the energy range from E_C−0.47eV to E_C−0.37eV. By applying different bias conditions, the contributions from AlGaN barrier traps can be effectively decoupled from those associated with UID-GaN buffer traps. This further confirms that the additional degradation observed in partially recessed-gate devices originates from trap states introduced by the recessed-gate region. As a result, the dynamic R_ON degradation under off-state high drain bias is governed by trap states located in the gate oxide, at the interface, and in the AlGaN barrier, with the corresponding energy level extracted to be approximately 0.21 eV below the conduction band.