CMOS Based Spiking-Time Dependent Plasticity Circuit and Simple Image Classification

The Von Neumann structure is the most applied structure in modern computers. However, it is hitting the bottleneck due to higher fabrication requirements and more demanding high-performance equipment demands. Meanwhile, neuromorphic computing, a life science-inspired structure, is in booming development. In addition, the 'Spike Neural Network' (SNN) of the 3rd generation, whose mechanism includes Spike-Timing Dependent Plasticity (STDP) is also flourishing as a subsequent derivative. In this project, a circuit for the STDP hardware implementation is achieved and optimized. We use the self-developed neuro synaptic unit to preprocess the data to achieve a more efficient and accurate conversion of pixels into analog signals sent to the neural network circuit. The project successfully implemented an ideal memristor model in software for simulation. The weight gain and weight reduction circuitry were also designed and revised based on previous releases, eventually achieving the desired adjustable STDP performance and improved power consumption. The functionality of the STDP circuit is validated by successfully adjusting the memristor conductance based on the spike timing. Finally, a 4×2 array is created, and a simple image identification task is completed. The array has good robustness to image distortion. In the future, the array structure will be designed in the 1T1R scheme for the VLSI implementation, and the peripheral circuits will be further optimized.