A Sub-20 mV VTH Hysteresis Enhancement-mode GaN p-FET with PEALD AlON Gate Dielectric

Xuanming Zhang; Jiachen Duan; Yihan Ding; Qiyi Guo; Jingyue Wu; Ye Liang; Yuanlei Zhang; Jiangmin Gu; Jie Zhang; Ivona Mitrovic; Harm Van Zalinge; Kain Lu Low; Sen Huang; Wen Liu

doi:10.1109/LED.2026.3663022

A Sub-20 mV V_TH Hysteresis Enhancement-mode GaN p-FET with PEALD AlON Gate Dielectric

Xuanming Zhang
, Jiachen Duan
, Yihan Ding
, Qiyi Guo
, Jingyue Wu
, Ye Liang
, Yuanlei Zhang
, Jiangmin Gu
, Jie Zhang
, Ivona Mitrovic
, Harm Van Zalinge
, Kain Lu Low
, Sen Huang
, Wen Liu^*

^*Corresponding author for this work

Xi'an Jiaotong-Liverpool University
University of Liverpool
Chinese Academy of Sciences

Research output: Contribution to journal › Article › peer-review

Abstract

Large threshold voltage (V_TH) hysteresis in GaN p-channel heterojunction field-effect transistors (p-FETs) significantly degrade device performance and limit its complementary circuit integration potential. This paper reduces the V_TH hysteresis of enhancement-mode (E-mode) GaN p-FETs to 20 mV by employing a novel plasma-enhanced atomic layer deposition (PEALD)-grown AlON gate dielectric. Compared to p-FET with Al₂O₃ gate dielectric, a 15 nm PEALD AlON improved hysteresis from 4.1 V to sub-20 mV under dual-sweep dc-mode measurement. Furthermore, the fabricated E-mode p-FETs with AlON and Al₂O₃ gate dielectrics achieve ON-resistance (R_ON) of 670 Ω·mm and 1268 Ω·mm, and ON-state current (I_ON) of 8.2 mA/mm and 2.8 mA/mm, respectively. The novel AlON dielectric provides significant opportunities for developing GaN complementary circuit integration.

Original language	English
Journal	IEEE Electron Device Letters
DOIs	https://doi.org/10.1109/LED.2026.3663022
Publication status	Accepted/In press - 2026

Keywords

GaN
Hysteresis
ON-state Current
p-FET AlON

Access to Document

10.1109/LED.2026.3663022

Cite this

@article{0f76316c13dc410f8bd4ab92f01064ba,

title = "A Sub-20 mV VTH Hysteresis Enhancement-mode GaN p-FET with PEALD AlON Gate Dielectric",

abstract = "Large threshold voltage (VTH) hysteresis in GaN p-channel heterojunction field-effect transistors (p-FETs) significantly degrade device performance and limit its complementary circuit integration potential. This paper reduces the VTH hysteresis of enhancement-mode (E-mode) GaN p-FETs to 20 mV by employing a novel plasma-enhanced atomic layer deposition (PEALD)-grown AlON gate dielectric. Compared to p-FET with Al2O3 gate dielectric, a 15 nm PEALD AlON improved hysteresis from 4.1 V to sub-20 mV under dual-sweep dc-mode measurement. Furthermore, the fabricated E-mode p-FETs with AlON and Al2O3 gate dielectrics achieve ON-resistance (RON) of 670 Ω·mm and 1268 Ω·mm, and ON-state current (ION) of 8.2 mA/mm and 2.8 mA/mm, respectively. The novel AlON dielectric provides significant opportunities for developing GaN complementary circuit integration.",

keywords = "GaN, Hysteresis, ON-state Current, p-FET AlON",

author = "Xuanming Zhang and Jiachen Duan and Yihan Ding and Qiyi Guo and Jingyue Wu and Ye Liang and Yuanlei Zhang and Jiangmin Gu and Jie Zhang and Ivona Mitrovic and Zalinge, \{Harm Van\} and Low, \{Kain Lu\} and Sen Huang and Wen Liu",

note = "Publisher Copyright: {\textcopyright} 1980-2012 IEEE.",

year = "2026",

doi = "10.1109/LED.2026.3663022",

language = "English",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

}

TY - JOUR

T1 - A Sub-20 mV VTH Hysteresis Enhancement-mode GaN p-FET with PEALD AlON Gate Dielectric

AU - Zhang, Xuanming

AU - Duan, Jiachen

AU - Ding, Yihan

AU - Guo, Qiyi

AU - Wu, Jingyue

AU - Liang, Ye

AU - Zhang, Yuanlei

AU - Gu, Jiangmin

AU - Zhang, Jie

AU - Mitrovic, Ivona

AU - Zalinge, Harm Van

AU - Low, Kain Lu

AU - Huang, Sen

AU - Liu, Wen

PY - 2026

Y1 - 2026

N2 - Large threshold voltage (VTH) hysteresis in GaN p-channel heterojunction field-effect transistors (p-FETs) significantly degrade device performance and limit its complementary circuit integration potential. This paper reduces the VTH hysteresis of enhancement-mode (E-mode) GaN p-FETs to 20 mV by employing a novel plasma-enhanced atomic layer deposition (PEALD)-grown AlON gate dielectric. Compared to p-FET with Al2O3 gate dielectric, a 15 nm PEALD AlON improved hysteresis from 4.1 V to sub-20 mV under dual-sweep dc-mode measurement. Furthermore, the fabricated E-mode p-FETs with AlON and Al2O3 gate dielectrics achieve ON-resistance (RON) of 670 Ω·mm and 1268 Ω·mm, and ON-state current (ION) of 8.2 mA/mm and 2.8 mA/mm, respectively. The novel AlON dielectric provides significant opportunities for developing GaN complementary circuit integration.

AB - Large threshold voltage (VTH) hysteresis in GaN p-channel heterojunction field-effect transistors (p-FETs) significantly degrade device performance and limit its complementary circuit integration potential. This paper reduces the VTH hysteresis of enhancement-mode (E-mode) GaN p-FETs to 20 mV by employing a novel plasma-enhanced atomic layer deposition (PEALD)-grown AlON gate dielectric. Compared to p-FET with Al2O3 gate dielectric, a 15 nm PEALD AlON improved hysteresis from 4.1 V to sub-20 mV under dual-sweep dc-mode measurement. Furthermore, the fabricated E-mode p-FETs with AlON and Al2O3 gate dielectrics achieve ON-resistance (RON) of 670 Ω·mm and 1268 Ω·mm, and ON-state current (ION) of 8.2 mA/mm and 2.8 mA/mm, respectively. The novel AlON dielectric provides significant opportunities for developing GaN complementary circuit integration.

KW - GaN

KW - Hysteresis

KW - ON-state Current

KW - p-FET AlON

UR - https://www.scopus.com/pages/publications/105029923374

U2 - 10.1109/LED.2026.3663022

DO - 10.1109/LED.2026.3663022

M3 - Article

AN - SCOPUS:105029923374

SN - 0741-3106

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters