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A 2.5 ppm/°C voltage reference combining traditional bgr and ztc mosfet high-order curvature compensation

  • Xifeng Liu*
  • , Shan Liang
  • , Wenju Liu
  • , Ping Sun
  • *Corresponding author for this work
  • Jiangsu College of Information Technology
  • CAS - Institute of Automation

Research output: Contribution to journalArticlepeer-review

25 Citations (Scopus)

Abstract

This brief presents a voltage reference with high-order curvature compensation based on the zero temperature coefficient (ZTC) of MOSFET. The proposed voltage reference uses a conventional current reference to generate a constant current as of the bias of ZTCMOS. A curvature compensation method based on the α power model is combined with the conventional curvature compensation method to obtain a low temperature coefficient. Test results of the proposed voltage reference fabricated with the CSMC 0.18μ m CMOS process demonstrate that the output voltage is 628mV. The trimmed temperature coefficient achieves 2.5 ppm/°C. The line sensitivity is 0.03 %/V, the chip area is 0.024 mm2, power consumption is 77 μ W. The simulated power supply rejection ratio (PSRR) reaches -91.4 dB at 100 MHz.

Original languageEnglish
Article number9209100
Pages (from-to)1093-1097
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume68
Issue number4
DOIs
Publication statusPublished - Apr 2021
Externally publishedYes

Keywords

  • Cmos process
  • Curvature compensation
  • PSRR
  • Voltage reference
  • ZTC
  • α Power model

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